Reset control register 1
| TIMER0_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| TIMER1_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| TIMER2_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| TIMER3_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| RITIMER_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| SCT_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| MOTOCONPWM_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| QEI_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| ADC0_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| ADC1_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| DAC_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| RESERVED | Reserved |
| UART0_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| UART1_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| UART2_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| UART3_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| I2C0_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| I2C1_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| SSP0_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| SSP1_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| I2S_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| SPIFI_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| CAN1_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| CAN0_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| M0APP_RST | Writing a one activates the reset. Writing a 0 clears the reset. This bit must be cleared by software. |
| SGPIO_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| SPI_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| RESERVED | Reserved |
| ADCHS_RST | Writing a one activates the reset. This bit is automatically cleared to 0 after one clock cycle. |
| RESERVED | Reserved |
| RESERVED | Reserved |
| RESERVED | Reserved |